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authorAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>2023-01-20 10:20:44 +0100
committerStephen Boyd <sboyd@kernel.org>2023-01-30 16:45:34 -0800
commit3b5bc4691f13e19d72f1fc5312ce5ee89ef51748 (patch)
tree4a9f352107137d388d7abb66814cee946b19b9e5 /tools/perf/scripts/python/export-to-sqlite.py
parente4078219e934e6b43ab3049af0dbd41664951dd8 (diff)
clk: mediatek: clk-mt8192: Move CLK_TOP_CSW_F26M_D2 in top_divs
This driver is registered early in clk_mt8192_top_init_early() and then again in clk_mt8192_top_probe(): the difference between the two is that the early one is probed with CLK_OF_DECLARE_DRIVER and the latter is regularly probed as a platform_driver. Knowing that it is not necessary for this platform to register the TOP_CSW_F26M_D2 clock that early, move it to top_divs and register it with the others during platform_driver probe for topckgen; While at it, since the only reason why the early probe existed was to register that clock, remove that entirely - leaving this driver to use only platform_driver. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Miles Chen <miles.chen@mediatek.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Tested-by: Miles Chen <miles.chen@mediatek.com> Link: https://lore.kernel.org/r/20230120092053.182923-15-angelogioacchino.delregno@collabora.com Tested-by: Mingming Su <mingming.su@mediatek.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
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