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| author | Manivannan Sadhasivam <[email protected]> | 2023-03-08 13:54:23 +0530 |
|---|---|---|
| committer | Vinod Koul <[email protected]> | 2023-03-20 18:14:55 +0530 |
| commit | 364c748d5e085a4cf425bbca90482e8df77d022e (patch) | |
| tree | 0720ffc8fbda19744850e581038eda1e7d335a01 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 458aa82041ce3cd46ff5f9afd078f62a683daa28 (diff) | |
phy: qcom-qmp-pcie: Add RC init sequence for SDX55
Add PCIe RC init sequence making use of the common init sequence. The RC
mode additionally requires REFCLK_DRV_DSBL bit to set during powerup and
powerdown.
Signed-off-by: Manivannan Sadhasivam <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions