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| author | Biju Das <biju.das@bp.renesas.com> | 2018-03-28 20:26:11 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2018-04-16 13:39:38 +0200 |
| commit | 343e64a6c48a6c86552db945d842283eee9f528b (patch) | |
| tree | 9270fc8f956f199c9b1d6cba8a845525d88c23a4 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | cdc749e22925d5b370cb51ace3cace940bd76cb5 (diff) | |
clk: renesas: Add r8a77470 CPG Core Clock Definitions
Add all RZ/G1C Clock Pulse Generator Core Clock Outputs, as listed in
Table 7.2 ("List of Clocks [RZ/G1C]") of the RZ/G1C Hardware User's
Manual.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
[geert: Use consecutive numbering]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions