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authorCharlene Liu <Charlene.Liu@amd.com>2021-12-05 21:19:30 -0500
committerAlex Deucher <alexander.deucher@amd.com>2021-12-28 16:51:24 -0500
commit2eb82577a16d4c8eb31e4ed520649850bb95b223 (patch)
tree903b23782d35293e9a34547424e5988d1572f85d /tools/perf/scripts/python/export-to-sqlite.py
parentebae8973884ee9ac703b3bfe34cabbb118b18538 (diff)
drm/amd/display: fix B0 TMDS deepcolor no dislay issue
[why] B0 PHY C map to F, D map to G driver use logic instance, dmub does the remap. Driver still need use the right PHY instance to access right HW. [how] use phyical instance when program PHY register. [note] could move resync_control programming to dmub next. Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Charlene Liu <Charlene.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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