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| author | Shaokun Zhang <[email protected]> | 2017-10-19 19:05:19 +0800 |
|---|---|---|
| committer | Will Deacon <[email protected]> | 2017-10-19 17:06:35 +0100 |
| commit | 2bab3cf9104c5ab80a1b9c706d81d997548401e4 (patch) | |
| tree | a06bcc3b3f431ff9cbbfa016648c455c5bdac8c8 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 2940bc4333707a05e69b3ffd737bda0dc0c3004f (diff) | |
perf: hisi: Add support for HiSilicon SoC HHA PMU driver
L3 cache coherence is maintained by Hydra Home Agent (HHA) in HiSilicon
SoC. This patch adds support for HHA PMU driver, Each HHA has own
control, counter and interrupt registers and is an separate PMU. For
each HHA PMU, it has 16-programable counters and each counter is
free-running. Interrupt is supported to handle counter (48-bits)
overflow.
Acked-by: Mark Rutland <[email protected]>
Reviewed-by: Jonathan Cameron <[email protected]>
Signed-off-by: Shaokun Zhang <[email protected]>
Signed-off-by: Anurup M <[email protected]>
Signed-off-by: Will Deacon <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions