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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2019-10-23 14:29:41 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2019-11-01 13:36:39 +0100 |
| commit | 2ba738d56db4ddb1c17e418cb501d303a8b481d2 (patch) | |
| tree | 9b1dc3922dc18dcade3b6e78ee61c29a66fbb09e /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 92d1ebae9abf1cd9460d8d0b3354262102a13634 (diff) | |
clk: renesas: r8a7796: Add R8A77961 CPG/MSSR support
Add support for the R-Car M3-W+ (R8A77961) SoC to the Renesas Clock
Pulse Generator / Module Standby and Software Reset driver.
R-Car M3-W+ is very similar to R-Car M3-W (R8A77960), which allows for
both SoCs to share a driver. R-Car M3-W+ lacks a few modules, so their
clocks must be nullified.
Based on a patch in the BSP by Takeshi Kihara
<takeshi.kihara.df@renesas.com>.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20191023122941.12342-5-geert+renesas@glider.be
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
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