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authorVille Syrjälä <ville.syrjala@linux.intel.com>2015-05-26 20:22:39 +0300
committerDaniel Vetter <daniel.vetter@ffwll.ch>2015-05-28 11:13:50 +0200
commitfde61e4b80ff23a379210a5780e59ace4bd915e6 (patch)
tree13d44fcf848c192bea5c6df0556b7088df547010 /tools/perf/scripts/python/export-to-postgresql.py
parentbc284542dad88046eefa3a8d4d9907529c4af9e0 (diff)
drm/i915: Throw out WIP CHV power well definitions
Expecting CHV power wells to be just an extended versions of the VLV power wells, a bunch of commented out power wells were added in anticipation when Punit folks would implement it all. Turns out they never did, and instead CHV has fewer power wells than VLV. Rip out all the #if 0'ed junk that's not needed. v2: Rename the "pipe-a" well to "display" to match VLV Clarify the pipe A power well relationship to pipes B and C (Deepak) Reviewed-by: Deepak S <deepak.s@linux.intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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