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authorSergio Paracuellos <[email protected]>2018-11-04 11:49:53 +0100
committerGreg Kroah-Hartman <[email protected]>2018-11-11 11:36:16 -0800
commitfb672b450ccced9032c58c111c6aaf6aa39ab544 (patch)
treea217f94b7724b5bd56102892ba49addc94ce6a37 /tools/perf/scripts/python/export-to-postgresql.py
parent301c15be69afa98b188545d83422245c01f69743 (diff)
staging: mt7621-pci: add some definitions for enabling and disabling GEN and GEN1 clocks
Instead of use hardcoded values when calling 'rt_sysc_m32' for enabling and disabling RALINK_PCIE_CLK_GEN and RALINK_PCIE_CLK_GEN1 create some preprocessor definitions. Signed-off-by: Sergio Paracuellos <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
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