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| author | Madhav Chauhan <[email protected]> | 2016-12-02 10:23:53 +0200 |
|---|---|---|
| committer | Ander Conselvan de Oliveira <[email protected]> | 2016-12-02 16:41:47 +0200 |
| commit | f7044dd904d7a97967af097515da272fa89b00e9 (patch) | |
| tree | a7d59379ae480dae359c5be6c2ef5bb1bd6c875d /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 51b3ee35affa3695bd89f6c6cdb22cd65aff5155 (diff) | |
drm/i915/glk: Update Port PLL enable sequence for Geminilkae
Add steps for enabling and disabling Port PLL as per bspec.
Signed-off-by: Madhav Chauhan <[email protected]>
Signed-off-by: Ander Conselvan de Oliveira <[email protected]>
Reviewed-by: Rodrigo Vivi <[email protected]>
Link: http://patchwork.freedesktop.org/patch/msgid/1480667037-11215-6-git-send-email-ander.conselvan.de.oliveira@intel.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions