MIPS: alchemy: Remove pointless irqdisable/enable

bcsr_csc_handler() is a cascading interrupt handler. It has a
disable_irq_nosync()/enable_irq() pair around the generic_handle_irq()
call. The value of this disable/enable is zero because its a complete
noop:

disable_irq_nosync() merily increments the disable count without
actually masking the interrupt. enable_irq() soleley decrements the
disable count without touching the interrupt chip. The interrupt
cannot arrive again because the complete call chain runs with
interrupts disabled.

Remove it.

[[email protected]: Fold in followup fix from Thomas Gleixner.]

Signed-off-by: Thomas Gleixner <[email protected]>
Cc: [email protected]
Cc: LKML <[email protected]>
Cc: Jiang Liu <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/10702/
Patchwork: https://patchwork.linux-mips.org/patch/10708/
Signed-off-by: Ralf Baechle <[email protected]>

0 files changed, 0 insertions, 0 deletions