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| author | Gabriele Paoloni <gabriele.paoloni@huawei.com> | 2015-10-08 14:27:53 -0500 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2015-11-02 14:48:45 -0600 |
| commit | b6b18f589e1ddbfbc31f72ea7fb8a723a2d10058 (patch) | |
| tree | b3eed584ffa7dfc38ccb617ef5fc795741630bf1 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 4c45852f494dab827291c656ee9e12f3f4ee64d6 (diff) | |
PCI: designware: Require config accesses to be naturally aligned
Add sanity checks on "addr" input parameter in dw_pcie_cfg_read() and
dw_pcie_cfg_write(). These checks make sure that accesses are aligned on
their size, e.g., a 4-byte config access is aligned on a 4-byte boundary.
[bhelgaas: changelog, set *val = 0 in failure case]
Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions