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| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2020-12-07 22:35:11 +0200 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2021-01-26 15:45:54 +0200 |
| commit | a2a5f5628e5494ca9353f761f7fe783dfa82fb9a (patch) | |
| tree | f96d4e86854b7b0ff37199281e88b33b8f5289b5 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | ef99a60ffd9b918354e038bc5e61f007ff7e901d (diff) | |
drm/i915: Fix ICL MG PHY vswing handling
The MH PHY vswing table does have all the entries these days. Get
rid of the old hacks in the code which claim otherwise.
This hack was totally bogus anyway. The correct way to handle the
lack of those two entries would have been to declare our max
vswing and pre-emph to both be level 2.
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Clinton Taylor <clinton.a.taylor@intel.com>
Fixes: 9f7ffa297978 ("drm/i915/tc/icl: Update TC vswing tables")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201207203512.1718-1-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
(cherry picked from commit 5ec346476e795089b7dac8ab9dcee30c8d80ad84)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions