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authorItamar Gozlan <igozlan@nvidia.com>2023-08-07 15:07:26 +0300
committerSaeed Mahameed <saeedm@nvidia.com>2023-08-21 10:55:16 -0700
commit95c337cce0e11d06a715da73e6796ade9216637f (patch)
tree55a7d450dccc412caa722368a9a3ad3cdb776bf5 /tools/perf/scripts/python/export-to-postgresql.py
parentdf3822f5808de66903a3627bf0694909447faa32 (diff)
net/mlx5: DR, Supporting inline WQE when possible
In WQE (Work Queue Entry), the two types of data segments memories are pointers and inline data, where inline data is passed directly as part of the WQE. For software steering, the maximal inline size should be less than 2*MLX5_SEND_WQE_BB, i.e., the potential data must fit with the required inline WQE headers. Two consecutive blocks (MLX5_SEND_WQE_BB) are not guaranteed to reside on the same memory page. Hence, writes to MLX5_SEND_WQE_BB should be done separately, i.e., each MLX5_SEND_WQE_BB should be obtained using the mlx5_wq_cyc_get_wqe macro. Signed-off-by: Itamar Gozlan <igozlan@nvidia.com> Reviewed-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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