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authorDaniel Palmer <daniel@0x0f.com>2020-10-02 22:34:15 +0900
committerOlof Johansson <olof@lixom.net>2020-10-03 12:48:08 -0700
commit925595f77f8bcf0159d9ff97141eeb1fed506888 (patch)
treee1674327756954e7df002d4b679484c285ebc0b4 /tools/perf/scripts/python/export-to-postgresql.py
parent5c505432deb545580b41fa6d751721f319974f13 (diff)
ARM: mstar: Add interrupt controller to base dtsi
Add the IRQ and FIQ intc instances to the base MStar/SigmaStar v7 dtsi. All of the known SoCs have both and at the same place with their common IPs using the same interrupt lines. Link: https://lore.kernel.org/r/20201002133418.2250277-3-daniel@0x0f.com Signed-off-by: Daniel Palmer <daniel@0x0f.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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