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| author | Keerthy <j-keerthy@ti.com> | 2015-07-08 11:12:26 +0530 |
|---|---|---|
| committer | Paul Walmsley <paul@pwsan.com> | 2015-07-23 06:08:19 -0600 |
| commit | 8d4be7d8bf04f93cfb1512a078bd276efc270793 (patch) | |
| tree | e039b494201642d8e127b341baa764c7548004e6 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 6e487001c5b0939e6083327432565559d8aab6fc (diff) | |
ARM: OMAP: PRM: Remove hardcoding of IRQENABLE_MPU_2 and IRQSTATUS_MPU_2 register offsets
The register offsets of IRQENABLE_MPU_2 and IRQSTATUS_MPU_2 are hardcoded.
This makes it difficult to reuse the code for SoCs like AM437x that have
a single instance of IRQENABLE_MPU and IRQSTATUS_MPU registers.
Hence handling the case using offset of 4 to accommodate single set of IRQ*
registers generically.
Signed-off-by: Keerthy <j-keerthy@ti.com>
[paul@pwsan.com: fixed whitespace alignment problems reported by checkpatch.pl]
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions