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authorNishanth Menon <nm@ti.com>2023-05-31 16:32:10 -0500
committerVignesh Raghavendra <vigneshr@ti.com>2023-06-15 11:05:47 +0530
commit7f209dd1267ce2a4a5f6a9e4571858fa2d2e588c (patch)
tree67dae8d1adae2155fc10be851118309df5ce441c /tools/perf/scripts/python/export-to-postgresql.py
parent389ad7111ddd99a05c75bc7d4f480a0526761d06 (diff)
arm64: dts: ti: k3-j721e: Add general purpose timers
There are 20 general purpose timers on j721e that can be used for things like PWM using pwm-omap-dmtimer driver. There are also additional ten timers in the MCU domain which are meant for MCU firmware usage and hence marked reserved by default. The odd numbered timers have the option of being cascaded to even timers to create a 64 bit non-atomic counter which is racy in simple usage, hence the clock muxes are explicitly setup to individual 32 bit counters driven off system crystal (HFOSC) as default. These instantiation differs from J7200 and other SoCs with the device IDs and clocks involved for muxing. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20230531213215.602395-2-nm@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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