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authorSungbo Eo <[email protected]>2020-03-21 22:38:42 +0900
committerMarc Zyngier <[email protected]>2020-03-22 11:52:16 +0000
commit6a214a28132f19ace3d835a6d8f6422ec80ad200 (patch)
tree53fd92715339dab893c27f707a5ff7e6c2e0bec0 /tools/perf/scripts/python/export-to-postgresql.py
parentb2cb11f4f7643255b7703c0fcabc31a8ec478f3a (diff)
irqchip/versatile-fpga: Apply clear-mask earlier
Clear its own IRQs before the parent IRQ get enabled, so that the remaining IRQs do not accidentally interrupt the parent IRQ controller. This patch also fixes a reboot bug on OX820 SoC, where the remaining rps-timer IRQ raises a GIC interrupt that is left pending. After that, the rps-timer IRQ is cleared during driver initialization, and there's no IRQ left in rps-irq when local_irq_enable() is called, which evokes an error message "unexpected IRQ trap". Fixes: bdd272cbb97a ("irqchip: versatile FPGA: support cascaded interrupts from DT") Signed-off-by: Sungbo Eo <[email protected]> Signed-off-by: Marc Zyngier <[email protected]> Reviewed-by: Linus Walleij <[email protected]> Cc: [email protected] Link: https://lore.kernel.org/r/[email protected]
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