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| author | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2019-01-03 13:59:50 +0200 |
|---|---|---|
| committer | Andrzej Hajda <a.hajda@samsung.com> | 2019-01-09 10:49:29 +0100 |
| commit | 4d9d54a730434cc068dd3515ba6116697196f77b (patch) | |
| tree | 7c275df1fcb4ddf9bf36e618eac183548206a699 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | adf4109896bbee27fd2ac3b48d22d6a0062fe517 (diff) | |
drm/bridge: tc358767: fix single lane configuration
PHY_2LANE bit is always set in DP_PHY_CTRL, breaking 1 lane use.
Set PHY_2LANE only when 2 lanes are used.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190103115954.12785-4-tomi.valkeinen@ti.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions