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| author | Wesley Chalmers <Wesley.Chalmers@amd.com> | 2022-11-03 22:29:31 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2023-04-26 22:27:17 -0400 |
| commit | 474f01015ffdb74e01c2eb3584a2822c64e7b2be (patch) | |
| tree | b069752a21d6600bbd572f0d5c08d4933d34777f /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 0c1f033159712b3d071cfe4a3ec0f36f1914453b (diff) | |
drm/amd/display: Do not set drr on pipe commit
[WHY]
Writing to DRR registers such as OTG_V_TOTAL_MIN on the same frame as a
pipe commit can cause underflow.
[HOW]
Move DMUB p-state delegate into optimze_bandwidth; enabling FAMS sets
optimized_required.
This change expects that Freesync requests are blocked when
optimized_required is true.
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions