diff options
| author | Thinh Nguyen <[email protected]> | 2019-08-08 16:39:42 -0700 |
|---|---|---|
| committer | Felipe Balbi <[email protected]> | 2019-08-09 08:31:38 +0300 |
| commit | 4749e0e61241cc121de572520a39dab365b9ea1d (patch) | |
| tree | 9bb5f9f08c454d35eed983c0e2bd2ef70e5f3612 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | b2a3974253d32374af556541141d7fdad8fe2ce0 (diff) | |
usb: dwc3: Update soft-reset wait polling rate
Starting from DWC_usb31 version 1.90a and later, the DCTL.CSFRST bit
will not be cleared until after all the internal clocks are synchronized
during soft-reset. This may take a little more than 50ms. Set the
polling rate at 20ms instead.
Signed-off-by: Thinh Nguyen <[email protected]>
Signed-off-by: Felipe Balbi <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions