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authorYangbo Lu <yangbo.lu@nxp.com>2020-01-17 14:38:58 +0800
committerUlf Hansson <ulf.hansson@linaro.org>2020-01-20 12:10:24 +0100
commit429d939c194b2e81e4a669671efc8c0c2fb9887e (patch)
tree6fa6dd5a87a04ca0a8f683ba629b20c46fca0757 /tools/perf/scripts/python/export-to-postgresql.py
parent2fefc7c5f7d16e2e0e66f1e3ebd1cd0755ecd82e (diff)
mmc: sdhci-of-esdhc: fix transfer mode register reading
The standard SD controller uses two 16-bit registers for command sending. 0xC: Transfer Mode Register 0xE: Command Register But the eSDHC controller uses one 32-bit register instead. 0xC: XFERTYPE For Transfer Mode Register and Command Register writing, the eSDHC driver will store Transfer Mode Register value in a variable first. When Command Register writing happens, driver will directly write a 32-bit value into XFERTYPE register. But for Transfer Mode Register reading, driver just returns a actual value. This may cause issue for some read-modify-write operations. We should make both reading and write on that variable for Transfer Mode Register. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Link: https://lore.kernel.org/r/20200117063858.37296-1-yangbo.lu@nxp.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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