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author | Jiawen Wu <jiawenwu@trustnetic.com> | 2023-08-23 14:19:30 +0800 |
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committer | David S. Miller <davem@davemloft.net> | 2023-08-25 07:42:58 +0100 |
commit | 2deea43f386d5c02cd490108aa3c6d02724594f8 (patch) | |
tree | 591c7e4124153c810384f189b5c6720c77d04d29 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | f629acc6f21043fdc80ae93cdafa6713888db0fd (diff) |
net: pcs: xpcs: add 1000BASE-X AN interrupt support
Enable CL37 AN complete interrupt for DW XPCS. It requires to clear the
bit(0) [CL37_ANCMPLT_INTR] of VR_MII_AN_INTR_STS after AN completed.
And there is a quirk for Wangxun devices to enable CL37 AN in backplane
configurations because of the special hardware design.
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions