diff options
| author | Rohit Khaire <[email protected]> | 2021-06-04 11:02:56 -0400 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2021-06-04 16:02:44 -0400 |
| commit | 18703923a66aecf6f7ded0e16d22eb412ddae72f (patch) | |
| tree | ef6167ecd622656f0def728aa2f31636089e1c5d /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 810085ddb7b76c1cc5059a1feb3b1250eceacf23 (diff) | |
drm/amdgpu: Fix incorrect register offsets for Sienna Cichlid
RLC_CP_SCHEDULERS and RLC_SPARE_INT0 have different
offsets for Sienna Cichlid
Signed-off-by: Rohit Khaire <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions