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authorImre Deak <[email protected]>2015-06-18 17:25:54 +0300
committerDaniel Vetter <[email protected]>2015-06-30 12:35:30 +0200
commit05712c1561041d102d3cac7d7e79548b1446caa4 (patch)
treefcb32d7ac4643b1f9b4e1f6457834f9da912413d /tools/perf/scripts/python/export-to-postgresql.py
parentf8896f5d58e64bfd3c2b5f7c5ba5c3f3967e93c7 (diff)
drm/i915/bxt: add missing DDI PLL registers to the state checking
Although we have a fixed setting for the PLL9 and EBB4 registers, it still makes sense to check them together with the rest of PLL registers. While at it also remove a redundant comment about 10 bit clock enabling. Signed-off-by: Imre Deak <[email protected]> Reviewed-by: Sonika Jindal <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
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