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| author | Russell King <[email protected]> | 2021-02-02 17:07:46 +0000 |
|---|---|---|
| committer | Bjorn Helgaas <[email protected]> | 2021-02-17 17:25:31 -0600 |
| commit | f8ee579d53aca887d93f5f411462f25c085a5106 (patch) | |
| tree | 425c91abdb0bf4d44413f7d1635a6e72aebc2363 /tools/perf/scripts/python/event_analyzing_sample.py | |
| parent | 508d392ae0bb3729d4c18628e021968a1b11b32c (diff) | |
PCI: pci-bridge-emul: Fix array overruns, improve safety
We allow up to PCI_EXP_SLTSTA2 registers to be accessed, but the
pcie_cap_regs_behavior[] array only covers up to PCI_EXP_RTSTA. Expand
this array to avoid walking off the end of it.
Do the same for pci_regs_behavior for consistency[], and add a
BUILD_BUG_ON() to also check the bridge->conf structure size.
Fixes: 23a5fba4d941 ("PCI: Introduce PCI bridge emulated config space common logic")
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Russell King <[email protected]>
Signed-off-by: Bjorn Helgaas <[email protected]>
Reviewed-by: Pali Rohár <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/event_analyzing_sample.py')
0 files changed, 0 insertions, 0 deletions