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authorVictor Shih <[email protected]>2023-06-09 15:14:39 +0800
committerUlf Hansson <[email protected]>2023-06-12 15:20:08 +0200
commitd2754355512e51c1e6c37975ccc5bdca635b3718 (patch)
treeb518789a3aab4e46b8e84af18c5d33991796c9dc /tools/perf/scripts/python/event_analyzing_sample.py
parentf3a5b56c1286444204c95ba78e1b03961aac580c (diff)
mmc: sdhci-pci-gli: Set SDR104's clock to 205MHz and enable SSC for GL9767
Set GL9767 SDR104's clock to 205MHz and enable SSC feature depend on register 0x888 BIT(1). Signed-off-by: Ben Chuang <[email protected]> Signed-off-by: Victor Shih <[email protected]> Acked-by: Adrian Hunter <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
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