diff options
| author | Like Xu <[email protected]> | 2021-02-01 13:10:31 +0800 |
|---|---|---|
| committer | Paolo Bonzini <[email protected]> | 2021-02-04 05:27:24 -0500 |
| commit | c646236344e9054cc84cd5a9f763163b9654cf7e (patch) | |
| tree | 09df32dacf9da772f2edc8f3896e4d7843a40f28 /tools/perf/scripts/python/event_analyzing_sample.py | |
| parent | 9c9520ce883386dc3794c7d60204487ff1db09cb (diff) | |
KVM: vmx/pmu: Add PMU_CAP_LBR_FMT check when guest LBR is enabled
Usespace could set the bits [0, 5] of the IA32_PERF_CAPABILITIES
MSR which tells about the record format stored in the LBR records.
The LBR will be enabled on the guest if host perf supports LBR
(checked via x86_perf_get_lbr()) and the vcpu model is compatible
with the host one.
Signed-off-by: Like Xu <[email protected]>
Message-Id: <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/event_analyzing_sample.py')
0 files changed, 0 insertions, 0 deletions