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| author | Paul Kocialkowski <paul.kocialkowski@bootlin.com> | 2018-12-05 10:24:36 +0100 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2018-12-05 12:02:10 +0100 |
| commit | 973efbc6a061488f280ac1792200e48eb0b1ff5e (patch) | |
| tree | b092c51bc0b54690bab12e848e0b1d0a45065ee1 /tools/perf/scripts/python/event_analyzing_sample.py | |
| parent | 925c5afd78c40169c7e0e6adec52d5119ff43751 (diff) | |
arm64: dts: allwinner: h5: Add system-control node with SRAM C1
Add the H5-specific system control node description to its device-tree
with support for the SRAM C1 section, that will be used by the video
codec node later on.
The CPU-side SRAM address was obtained empirically while the size was
taken from the documentation. They may not be entirely accurate.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'tools/perf/scripts/python/event_analyzing_sample.py')
0 files changed, 0 insertions, 0 deletions