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| author | Robert Hancock <robert.hancock@calian.com> | 2022-01-18 15:41:27 -0600 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2022-01-19 11:29:14 +0000 |
| commit | 95978df6fa328df619c15312e65ece469c2be2d2 (patch) | |
| tree | 44cda26598821c948e598ea2ad01195484948e4f /tools/perf/scripts/python/event_analyzing_sample.py | |
| parent | 04cc2da39698efd7eb2e30c112538922d26f848e (diff) | |
net: axienet: add missing memory barriers
This driver was missing some required memory barriers:
Use dma_rmb to ensure we see all updates to the descriptor after we see
that an entry has been completed.
Use wmb and rmb to avoid stale descriptor status between the TX path and
TX complete IRQ path.
Fixes: 8a3b7a252dca9 ("drivers/net/ethernet/xilinx: added Xilinx AXI Ethernet driver")
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'tools/perf/scripts/python/event_analyzing_sample.py')
0 files changed, 0 insertions, 0 deletions