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| author | Ville Syrjälä <[email protected]> | 2022-03-08 01:39:39 +0200 |
|---|---|---|
| committer | Ville Syrjälä <[email protected]> | 2022-03-10 11:07:32 +0200 |
| commit | 8b3ed19ccf9fc80d8d750f61c620eaf9836008ad (patch) | |
| tree | a3728ddff10cd04f834d0b759d7b5fdcfabd434b /tools/perf/scripts/python/event_analyzing_sample.py | |
| parent | 3917f4846532266f84a308333713d869b124b05a (diff) | |
drm/i915: Populate bxt/glk DPLL clock limits a bit more
Set the bxt/glk DPLL min dotclock to 25MHz (HDMI minimum)
and the max to 594 MHz (HDMI max). The supported DP frequencies
(162MHz-540MHz) fit within the same range.
Signed-off-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Acked-by: Jani Nikula <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/event_analyzing_sample.py')
0 files changed, 0 insertions, 0 deletions