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| author | Pierre-Louis Bossart <[email protected]> | 2020-09-01 23:05:51 +0800 |
|---|---|---|
| committer | Vinod Koul <[email protected]> | 2020-09-03 16:14:39 +0530 |
| commit | 88d7c71ea5b29b322d9c72103a196234cb5040db (patch) | |
| tree | 1bb290c180c7f7e16301f2afc865e2db30b44d69 /tools/perf/scripts/python/event_analyzing_sample.py | |
| parent | d78071b4e1c3252fdceeb1402eb2541649a97206 (diff) | |
soundwire: bus: update multi-link definition with hw sync details
Hardware-based synchronization is typically required when the
bus->multi_link flag is set.
On Intel platforms, when the Cadence IP is configured in 'Multi Master
Mode', the hardware synchronization is required even when a stream
only uses a single segment. The existing code only deal with hardware
synchronization when a stream uses more than one segment so to remain
backwards compatible we add a configuration threshold. For Intel cases
this threshold will be set to one, other platforms may be able to use
the SSP-based sync in those cases.
Signed-off-by: Pierre-Louis Bossart <[email protected]>
Signed-off-by: Bard Liao <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/event_analyzing_sample.py')
0 files changed, 0 insertions, 0 deletions