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authorChris Wilson <[email protected]>2019-12-18 09:35:04 +0000
committerChris Wilson <[email protected]>2019-12-18 13:00:17 +0000
commit81ff52b705775433a955b2746d37b87bdc89a3d0 (patch)
tree38fa940f2bd55bcb546c8dc3a199ee7de57c38aa /tools/perf/scripts/python/event_analyzing_sample.py
parentda42104f589d979bbe402703fd836cec60befae1 (diff)
drm/i915/gt: Ratelimit display power w/a
For very light workloads that frequently park, acquiring the display power well (required to prevent the dmc from trashing the system) takes longer than the execution. A good example is the igt_coherency selftest, which is slowed down by an order of magnitude in the worst case with powerwell cycling. To prevent frequent cycling, while keeping our fast soft-rc6, use a timer to delay release of the display powerwell. Fixes: 311770173fac ("drm/i915/gt: Schedule request retirement when timeline idles") References: https://gitlab.freedesktop.org/drm/intel/issues/848 Signed-off-by: Chris Wilson <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Reviewed-by: Tvrtko Ursulin <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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