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| author | Leela Krishna Amudala <[email protected]> | 2014-05-09 22:51:04 +0900 |
|---|---|---|
| committer | Kukjin Kim <[email protected]> | 2014-05-26 04:04:59 +0900 |
| commit | 75ad2ab28f0f184a7ba7f816b62be04c3c0ba80a (patch) | |
| tree | 6bfcb96f1e2bfbd80f86b4c6ae167dc6f1797337 /tools/perf/scripts/python/event_analyzing_sample.py | |
| parent | b5783dcaed065ae6622a9795a19a4eda748b64f8 (diff) | |
ARM: EXYNOS: use v7_exit_coherency_flush macro for cache disabling
A common macro v7_exit_coherency_flush available which does the below
tasks in the seqeunce.
-clearing C bit
-clearing L1 cache
-exit SMP
-instruction and data synchronization
So removing the local functions which does the same thing and use the
macro instead.
Signed-off-by: Leela Krishna Amudala <[email protected]>
Acked-by: Nicolas Pitre <[email protected]>
[[email protected]: tested on exynos3250 based board]
Tested-by: Chanwoo Choi <[email protected]>
Signed-off-by: Kukjin Kim <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/event_analyzing_sample.py')
0 files changed, 0 insertions, 0 deletions