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authorPeng Fan <[email protected]>2022-08-30 11:31:37 +0800
committerAbel Vesa <[email protected]>2022-09-19 13:06:45 +0300
commit67e16ac1fec475e64dcb8238f471c6fd154ef806 (patch)
treecd896277c054990707aee5ec4a5755bfa5c98903 /tools/perf/scripts/python/event_analyzing_sample.py
parent92d1496fe8644f6612b7adff7581a31002dc8dd0 (diff)
clk: imx93: add SAI IPG clk
The clk topology is as below: bus_aon_root------>\ /--->SAI IPG -->SAI LPCG gate--> sai[x]_clk_root--->/ \--->SAI MCLK So use shared count as i.MX93 MU_B gate. Signed-off-by: Peng Fan <[email protected]> Reviewed-by: Abel Vesa <[email protected]> Signed-off-by: Abel Vesa <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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