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authorKonrad Dybcio <[email protected]>2023-01-20 22:00:54 +0100
committerBjorn Andersson <[email protected]>2023-01-26 14:52:29 -0600
commit6636818ecf0f1d448360835017473cf94a0ee967 (patch)
treef9d86dd498ece686b209cd5729a12cda20ca2ccb /tools/perf/scripts/python/event_analyzing_sample.py
parenta63a420d050d47a6afb5e2198181dadd08e71f97 (diff)
arm64: dts: qcom: sm8350: Add missing #address/size-cells to DSIn
Panels/DRM bridges definitely don't need 64bits of address space and are usually not 32-bit wide. Set address-cells to 1 and size-cells to 0. Signed-off-by: Konrad Dybcio <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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