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| author | Lai Jiangshan <[email protected]> | 2021-11-08 20:43:56 +0800 |
|---|---|---|
| committer | Paolo Bonzini <[email protected]> | 2021-12-08 04:24:59 -0500 |
| commit | 5ec60aad547f716530ad308266eeab378a4e287c (patch) | |
| tree | b2cad25b98eebb91fefa4d32f13621d57cfcdd0b /tools/perf/scripts/python/event_analyzing_sample.py | |
| parent | 40e49c4f5fb0699b4b5b5b1ee0a1bc88b4fec00d (diff) | |
KVM: VMX: Add and use X86_CR4_TLBFLUSH_BITS when !enable_ept
In set_cr4_guest_host_mask(), X86_CR4_PGE is set to be intercepted when
!enable_ept just because X86_CR4_PGE is the only bit that is
responsible for flushing TLB but listed in KVM_POSSIBLE_CR4_GUEST_BITS.
It is clearer and self-documented to use X86_CR4_TLBFLUSH_BITS instead.
No functionality changed.
Signed-off-by: Lai Jiangshan <[email protected]>
Message-Id: <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/event_analyzing_sample.py')
0 files changed, 0 insertions, 0 deletions