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| author | Tang Yuantian <[email protected]> | 2014-01-13 16:16:35 +0800 |
|---|---|---|
| committer | Scott Wood <[email protected]> | 2014-01-17 19:01:27 -0600 |
| commit | 4b3cbc82a04485f6400cb5b227798daaa8512a23 (patch) | |
| tree | b6817c7007c109b4686abd746504615bb2475005 /tools/perf/scripts/python/event_analyzing_sample.py | |
| parent | 9841c79c890cf7ef9ffa2c86c9924113c9a88244 (diff) | |
clk: corenet: Adds the clock binding
Adds the clock bindings for Freescale PowerPC CoreNet platforms
Signed-off-by: Tang Yuantian <[email protected]>
Signed-off-by: Li Yang <[email protected]>
[[email protected]: fixed clock-frequency in example]
Signed-off-by: Scott Wood <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/event_analyzing_sample.py')
0 files changed, 0 insertions, 0 deletions