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| author | Sia Jee Heng <jeeheng.sia@starfivetech.com> | 2024-02-28 22:41:55 -0800 |
|---|---|---|
| committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2024-08-29 17:36:31 +0200 |
| commit | 4aca2bef90bd12969037468f71568fbef994a254 (patch) | |
| tree | c12739d75bcf532620054d3970179f74f59521ec /tools/perf/scripts/python/event_analyzing_sample.py | |
| parent | 7741e3c5f848e867c58c6e612c63a27c1681a493 (diff) | |
ACPICA: Headers: Add RISC-V SBI Subtype to DBG2
ACPICA commit 6f4c900bcf9ca065129353f17a83773aa58095aa
Include the RISC-V SBI debugging subtype as documented in DBG2
dated April 10, 2023 [1].
Link: https://learn.microsoft.com/en-us/windows-hardware/drivers/bringup/acpi-debug-port-table # [1]
Link: https://github.com/acpica/acpica/commit/6f4c900b
Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'tools/perf/scripts/python/event_analyzing_sample.py')
0 files changed, 0 insertions, 0 deletions