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| author | Takeshi Kihara <takeshi.kihara.df@renesas.com> | 2016-03-16 12:22:06 +0900 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2016-12-27 10:57:39 +0100 |
| commit | 4753231cc94683903135b9ca6d71eaab79f81349 (patch) | |
| tree | 1d0eda19758153be4469344ed813dc44ef3e1a9f /tools/perf/scripts/python/event_analyzing_sample.py | |
| parent | 3dc93dcea67c967308db8ba00bac1334cf43a083 (diff) | |
pinctrl: sh-pfc: r8a7796: Add MSIOF pins, groups and functions
This patch adds MSIOF{0,1,2,3} pins, groups and functions to R8A7796
SoC.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[geert: Correct MSIOF3 SS1_E/SS2_E pins]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/event_analyzing_sample.py')
0 files changed, 0 insertions, 0 deletions