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authorAndrew Jeffery <[email protected]>2019-07-11 13:49:42 +0930
committerLinus Walleij <[email protected]>2019-08-05 12:41:18 +0200
commit2eda1cdec49f8ae7878e60d1b06bd8157a95424f (patch)
tree37e7778f68b8f7ad4e697fe9f6dd01195574d34e /tools/perf/scripts/python/event_analyzing_sample.py
parent86392fac9a9c92f36c0a422a3075865a0fe959f9 (diff)
pinctrl: aspeed: Add AST2600 pinmux support
The AST2600 pinmux is fairly similar to the previous generations of ASPEED BMC SoCs in terms of architecture, though differ in some of the design details. The complexity of the pin expressions is largely reduced (e.g. there are no-longer signals with multiple expressions muxing them to the associated pin), and there are now signals and buses with multiple pin groups. The driver implements pinmux support for all 244 GPIO-capable pins plus a further four pins that are not GPIO capable but which expose multiple signals. pinconf will be implemented in a follow-up patch. The implementation has been smoke-tested under qemu, and run on hardware by ASPEED. Debugged-by: Johnny Huang <[email protected]> Signed-off-by: Andrew Jeffery <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Linus Walleij <[email protected]>
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