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| author | Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> | 2016-11-17 16:09:20 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2016-12-27 10:57:38 +0100 |
| commit | 2d40bd24274d257796291804a82a0b07564a11f1 (patch) | |
| tree | 934cbacfd555f089267f5c9dcf321d840ab743aa /tools/perf/scripts/python/event_analyzing_sample.py | |
| parent | 9e35d6fa825c02bdd00c24cb32299355702130bd (diff) | |
pinctrl: sh-pfc: r8a7796: Add bias pinconf support
Implements pull-up and pull-down. On this SoC there is no simple mapping
of GP pins to bias register bits, so we need a table.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/event_analyzing_sample.py')
0 files changed, 0 insertions, 0 deletions