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| author | Julien Thierry <[email protected]> | 2017-08-04 09:31:42 +0100 |
|---|---|---|
| committer | Catalin Marinas <[email protected]> | 2017-08-07 09:58:33 +0100 |
| commit | 1f9b8936f36f4a8e1d9923f5d03295d668cdf098 (patch) | |
| tree | 7a6e58e8db44791b7e7fcf9c17c5f979580971a6 /tools/perf/scripts/python/event_analyzing_sample.py | |
| parent | 17c28958600928109049a3bcc814b0d5bfb1ff3a (diff) | |
arm64: Decode information from ESR upon mem faults
When receiving unhandled faults from the CPU, description is very sparse.
Adding information about faults decoded from ESR.
Added defines to esr.h corresponding ESR fields. Values are based on ARM
Archtecture Reference Manual (DDI 0487B.a), section D7.2.28 ESR_ELx, Exception
Syndrome Register (ELx) (pages D7-2275 to D7-2280).
New output is of the form:
[ 77.818059] Mem abort info:
[ 77.820826] Exception class = DABT (current EL), IL = 32 bits
[ 77.826706] SET = 0, FnV = 0
[ 77.829742] EA = 0, S1PTW = 0
[ 77.832849] Data abort info:
[ 77.835713] ISV = 0, ISS = 0x00000070
[ 77.839522] CM = 0, WnR = 1
Signed-off-by: Julien Thierry <[email protected]>
Cc: Will Deacon <[email protected]>
Cc: Mark Rutland <[email protected]>
[[email protected]: fix "%lu" in a pr_alert() call]
Signed-off-by: Catalin Marinas <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/event_analyzing_sample.py')
0 files changed, 0 insertions, 0 deletions