diff options
| author | Anshuman Khandual <[email protected]> | 2018-09-20 09:36:19 +0530 |
|---|---|---|
| committer | Catalin Marinas <[email protected]> | 2018-09-21 11:05:25 +0100 |
| commit | 1c8391412d7794e0b38393ed98fef9a974401f05 (patch) | |
| tree | 5849691864f75b3d0e62040f00ba0bc57beec68c /tools/perf/scripts/python/event_analyzing_sample.py | |
| parent | 880f7cc47265e7b195781dfa9a0cd62ef78304e3 (diff) | |
arm64/cpufeatures: Introduce ESR_ELx_SYS64_ISS_RT()
Extracting target register from ESR.ISS encoding has already been required
at multiple instances. Just make it a macro definition and replace all the
existing use cases.
Reviewed-by: Suzuki K Poulose <[email protected]>
Acked-by: Mark Rutland <[email protected]>
Signed-off-by: Anshuman Khandual <[email protected]>
Signed-off-by: Catalin Marinas <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/event_analyzing_sample.py')
0 files changed, 0 insertions, 0 deletions