diff options
| author | Icenowy Zheng <[email protected]> | 2017-03-31 13:44:48 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <[email protected]> | 2017-04-08 17:51:48 +0200 |
| commit | 1a9636426b9f994d57dfe5a64e3f4644747a2e95 (patch) | |
| tree | 7f7b47253b29a169a9f21f82ee33f42822b71f74 /tools/perf/scripts/python/event_analyzing_sample.py | |
| parent | 4a72cda530f87ee0d96c4b79b9e1a865f7761659 (diff) | |
nvmem: sunxi-sid: add support for H3's SID controller
The H3 SoC have a bigger SID controller, which has its direct read
address at 0x200 position in the SID block, not 0x0.
Also, H3 SID controller has some silicon bug that makes the direct read
value wrong at cold boot, add code to workaround the bug. (This bug has
already been fixed on A64 and later SoCs)
Signed-off-by: Icenowy Zheng <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
Signed-off-by: Srinivas Kandagatla <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/event_analyzing_sample.py')
0 files changed, 0 insertions, 0 deletions