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| author | Takeshi Kihara <[email protected]> | 2017-07-13 01:55:36 +0900 |
|---|---|---|
| committer | Geert Uytterhoeven <[email protected]> | 2017-07-17 11:01:33 +0200 |
| commit | 04ee2ab395db733c04f02b6ba0d8f13aa0a5d744 (patch) | |
| tree | ae684b602dc964b89dce28205c5fb3227def4a89 /tools/perf/scripts/python/event_analyzing_sample.py | |
| parent | 7aa36a334dc3f11188d9cc024cfa06debb5cf7e6 (diff) | |
pinctrl: sh-pfc: r8a7796: Fix MOD_SEL2 bit26 to 0x0 when using SCK5_A
This patch fixes the implementation incorrect of MOD_SEL2 bit26 value
when SCK5_A pin function is selected for IPSR16 bit[31:28].
This is a correction to the incorrect implementation of MOD_SEL register
pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware
User's Manual Rev.0.51E or later.
Fixes: f9aece7344bd81ce ("pinctrl: sh-pfc: Initial R8A7796 PFC support")
Signed-off-by: Takeshi Kihara <[email protected]>
Signed-off-by: Yoshihiro Kaneko <[email protected]>
Signed-off-by: Geert Uytterhoeven <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/event_analyzing_sample.py')
0 files changed, 0 insertions, 0 deletions