aboutsummaryrefslogtreecommitdiff
path: root/tools/perf/scripts/python/compaction-times.py
diff options
context:
space:
mode:
authorOscar Mateo <[email protected]>2018-05-08 14:29:23 -0700
committerMika Kuoppala <[email protected]>2018-05-11 15:53:20 +0300
commitcc38cae7c4e9350c93aa2da506086415fecd6e4a (patch)
treef4463bcba92b8003574249bc4bb2c9df2ed34c7c /tools/perf/scripts/python/compaction-times.py
parentca6acc25250a1dc101c5a541b4f58bcc1dd65de5 (diff)
drm/i915/icl: Introduce initial Icelake Workarounds
Inherit workarounds from previous platforms that are still valid for Icelake. v2: GEN7_ROW_CHICKEN2 is masked v3: - Since it has been fixed already in upstream, removed the TODO comment about WA_SET_BIT for WaInPlaceDecompressionHang. - Squashed with this patch: drm/i915/icl: add icelake_init_clock_gating() from Paulo Zanoni <[email protected]> - Squashed with this patch: drm/i915/icl: WaForceEnableNonCoherent from Oscar Mateo <[email protected]> - WaPushConstantDereferenceHoldDisable is now Wa_1604370585 and applies to B0 as well. - WaPipeControlBefore3DStateSamplePattern WABB was being applied to ICL incorrectly. v4: - Wrap the commit message - s/dev_priv/p to please checkpatch v5: Rebased on top of the WA refactoring v6: Rebased on top of further whitelist registers refactoring (Michel) v7: Added WaRsForcewakeAddDelayForAck v8: s/ICL_HDC_CHICKEN0/ICL_HDC_MODE (Mika) v9: - C, not lisp (Chris) - WaIncreaseDefaultTLBEntries is the same for GEN > 9_LP (Tvrtko) Signed-off-by: Oscar Mateo <[email protected]> Cc: Rodrigo Vivi <[email protected]> Cc: Tomasz Lis <[email protected]> Cc: Mika Kuoppala <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Reviewed-by: Mika Kuoppala <[email protected]> Signed-off-by: Mika Kuoppala <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/compaction-times.py')
0 files changed, 0 insertions, 0 deletions