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| author | Samuel Holland <[email protected]> | 2023-02-06 13:43:35 +0000 |
|---|---|---|
| committer | Greg Kroah-Hartman <[email protected]> | 2023-02-06 19:06:58 +0100 |
| commit | c9dde85d25d3d59068bdb1e8cc5a4b7be5530bd4 (patch) | |
| tree | 589a1e0ea0d245891175f89b9d6667660899b71f /tools/perf/scripts/python/compaction-times.py | |
| parent | 3b65010018ec9a228416c4ccda193af6e8d74676 (diff) | |
nvmem: sunxi_sid: Drop the workaround on A64
Now that the SRAM readout code is fixed by using 32-bit accesses, it
always returns the same values as register readout, so the A64 variant
no longer needs the workaround. This makes the D1 variant structure
redundant, so remove it.
Signed-off-by: Samuel Holland <[email protected]>
Signed-off-by: Srinivas Kandagatla <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/compaction-times.py')
0 files changed, 0 insertions, 0 deletions