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authorJeeja KP <[email protected]>2017-01-02 09:50:02 +0530
committerMark Brown <[email protected]>2017-01-06 18:14:45 +0000
commit9cc8f9fe0f9e84771f2872f8939d37414ef9d58d (patch)
tree7c95de171e383b36954737f39cb79a43c8962624 /tools/perf/scripts/python/compaction-times.py
parenteee0e16f8c3cf31fbbae4a88e51d25abebbaf147 (diff)
ASoC: Intel: Common: Update dsp register poll implementation
Poll implementation is not quite accurate, especially for smaller values of timeout or timeout values close to the actual timeout needed Use jiffies to set the timeout value and time_before() to get the accurate time. So update the dsp register poll implementation to provide accurate timeout using jiffies. Signed-off-by: Jayachandran B <[email protected]> Signed-off-by: Jeeja KP <[email protected]> Acked-by: Vinod Koul <[email protected]> Signed-off-by: Mark Brown <[email protected]>
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