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author | Bryan O'Donoghue <[email protected]> | 2022-11-17 00:32:31 +0000 |
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committer | Bjorn Andersson <[email protected]> | 2022-12-06 11:05:31 -0600 |
commit | 3c5aa4c758dd4a41119158dff2ab358b9b5cd520 (patch) | |
tree | 8ef6227bcad79cfc437c048afc9c09af4aa08baa /tools/perf/scripts/python/compaction-times.py | |
parent | 64cb4a44720143a94a261ce2b3098498d6dc84d6 (diff) |
arm64: dts: qcom: sm8250: camss: Define ports and ports address/size cells
Define the set of possible ports, one for each CSI PHY along with the port
address and size cells @ the SoC dtsi level.
Suggested-by: Konrad Dybcio <[email protected]>
Suggested-by: Laurent Pinchart <[email protected]>
Reviewed-by: Vladimir Zapolskiy <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Bryan O'Donoghue <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/compaction-times.py')
0 files changed, 0 insertions, 0 deletions