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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2019-06-03 09:37:19 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2019-08-21 11:15:26 +0200 |
| commit | e9670ccb39dbcfc934ae9533163e81a769d2cb82 (patch) | |
| tree | a1b64aa39c54db24f37157877142f0132bed3e3f /tools/perf/scripts/python/check-perf-trace.py | |
| parent | 5f9e832c137075045d15cd6899ab0505cfb2ca4b (diff) | |
ARM: debug-ll: Add support for r7s9210
Enable low-level debugging support for RZ/A2M (r7s9210).
The RZA2MEVB board uses either SCIF2 (SDRAM enabled) or SCIF4 (HyperRAM
only) for the serial console.
Note that "SCIFA" serial ports on RZ/A2 SoCs use a compressed register
layout, hence add support for that to renesas-scif.S.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
0 files changed, 0 insertions, 0 deletions